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Kirchoff's Laws

Module by: Don Johnson

Summary: A brief description of Kirchoff's Laws (current and voltage)

Kirchoff's Current Law

At every node, the sum of all currents entering a node must equal zero. What this law means physically is that charge cannot accumulate in a node; what goes in must come out. In the example, Figure 1, below we have a three-node circuit and thus have three KCL equations.

-i- i 1 =0 i i 1 0 (1)
i 1 - i 2 =0 i 1 i 2 0 (2)
i+ i 2 =0 i i 2 0 (3)
Note that the current entering a node is the negative of the current leaving the node.

Given any two of these KCL equations, we can find the other by adding or subtracting them. Thus, one of them is redundant and, in mathematical terms, we can discard any one of them. The convention is to discard the equation for the (unlabeled) node at the bottom of the circuit.

Figure 1: The circuit shown is perhaps the simplest circuit that performs a signal processing function. The input is provided by the voltage source v in v in and the output is the voltage v out v out across the resistor labelled R 2 R 2 .
Figure 1
Subfigure 1.1Subfigure 1.2
Figure 1, Subfigure 1.1 (circuit4.png)Figure 1, Subfigure 1.2 (circuit4a.png)

Exercise 1

In writing KCL equations, you will find that in an nn-node circuit, exactly one of them is always redundant. Can you sketch a proof of why this might be true? Hint: It has to do with the fact that charge won't accumulate in one place on its own.

Solution 1

KCL says that the sum of currents entering or leaving a node must be zero. If we consider two nodes together as a "supernode", KCL applies as well to currents entering the combination. Since no currents enter an entire circuit, the sum of currents must be zero. If we had a two-node circuit, the KCL equation of one must be the negative of the other, We can combine all but one node in a circuit into a supernode; KCL for the supernode must be the negative of the remaining node's KCL equation. Consequently, specifying n-1 n 1 KCL equations always specifies the remaining one.

Kirchoff's Voltage Law (KVL)

The voltage law says that the sum of voltages around every closed loop in the circuit must equal zero. A closed loop has the obvious definition: Starting at a node, trace a path through the circuit that returns you to the origin node. KVL expresses the fact that electric fields are conservative: The total work performed in moving a test charge around a closed path is zero. The KVL equation for our circuit is

v 1 + v 2 -v=0 v 1 v 2 v 0 (4)
In writing KVL equations, we follow the convention that an element's voltage enters with a plus sign if traversing the closed path, we go from the positive to the negative of the voltage's definition.

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